This invention relates to a demodulator and demodulation method to demodulate a delay detection by inputting a signal which is phase modulated by digital signal.
Under such a condition that a reception signal is strongly effected by fading as in a mobile communication system, it is known that a demodulation by delay detection results in an excellent error rate performance as a demodulation method for a reception signal which k phase (k is an integer more then 2) is modulated. In addition, there is a demodulation method, disclosed in laid open Japanese Patent Application No. 1-328824 (filing date: Dec. 18th in 1989) by the same applicant as this one, as the phase modulation method by the delay detection effective for miniaturization, ease of adjustment, and integration of device.
Hereafter, this invention is described by using the block diagram in FIG. 5 and the timing chart in FIG. 6. To the phase measurement timing generator 11, the reception symbol cycle signal 101 which rising time is corresponding to the point at when the reception signal symbol switches, and the reception signal 102 at an intermediate frequency (IF) that is converted to the logical level, the positive amplitude is "1" and the negative one "0", are externally input. The phase measurement timing generator 11 outputs a phase measurement timing signal 103 obtained by a sampling of the reception symbol cycle signal 101 at the rising (tr1, tr2, etc.) of the reception signal 102. Consequently, the rising of the phase measurement timing signal 103 coincides with that of the phase measurement timing signal 102. On the other hand, the phase counter 31 is operated by the phase counter operation clock 301 (externally input), with a frequency multiplied by n (n is a positive integer) of the IF carrier frequency of the reception signal 102, and the contents 302 of the phase counter 31 at the rising of the reception signal 102 indicates an instant relative phase of the reception signal 102. Therefore, the contents 302 of the phase counter 31 at the rising of the phase measurement timing signal 103 almost indicates the instant relative phase of every reception symbol cycle. The phase rotation quantity 304 between symbol cycles can be calculated by calculating the differences between the instant relative phase 302 at the current phase measurement timing and the instant relative phase 303 before one symbol cycle by the subtracter 33, with memorizing of the instant relative phase 303 before one reception symbol cycle by the latch 32. The reception data 107 is demodulated by decoding this phase rotation quantity 304 by the decoder 34.
In the demodulator structured as above, to demodulate the reception data, the differences between the instant relative phase at the current phase measurement timing and the instant relative phase before one reception symbol cycle must be calculated by the subtracter, but there was a problem that the construction of the circuit is complicated.
In addition, since the resolution of phase measurement is 2 .pi./n when the phase counter is operated by the clock with the frequency multiplied by n (n is a positive integer) of the reception carrier frequency, for the original purpose to count a phase of the reception signal, it is sufficient if the frequency of clock operation of the phase counter is only multiplied by k of the reception carrier frequency when the reception signal is a phase modulation signal of k (k is an integer more than 2) phase. However, because the phase counter in the conventional demodulator is self-operating, the error 1 at worst is involved in the counted value of the phase counter. Because of this, this error must be relatively reduced by increasing the state number of phase counter that can be obtained at one cycle of reception carrier and breaking down the resolution of phase measurement as much as this error can be ignored.
To be concrete, when the number of sections of the phase counter is sufficient, there is no problem if the operating frequency of phase counter is made high enough with the reception carrier frequency. In other words, the resolution of phase measurement becomes high by lowering the reception carrier frequency and increasing the operating frequency of phase counter.
On the other hand, the phase measurement point should ideally be a timing of the reception symbol cycle signal, but it is made to wait until the rising or falling point of the reception carrier. Because of this, the measurement timing, at worst, is a time lag of one cycle of reception carrier compared with an ideal timing. Therefore, to raise the time accuracy of measurement timing, the ratio (reception carrier frequency/reception data frequency) between the reception carrier frequency and data frequency of reception signal (reception symbol frequency) must be increased, but the reception carrier frequency can not be lowered.
Thus, the operating frequency of the phase counter needs to be increased to raise the resolution of phase measurement of the demodulator, but there was a problem of excessive power consumption.